1. Technical Field
The embodiments described herein relate to a display device, and more particularly, to an output buffering circuit for a driver device, an amplifier circuit, and a display device employing the output buffering circuit.
2. Description of the Related Art
In general, a source driver chip for a display system includes several hundreds of source driving circuits, each for driving at least one source line of the panel in the display system. The power consumption of a single source driving circuit therefore has a large impact on the whole source driver chip. A source driving circuit generally includes an output buffer which takes a large part in the total power consumption and operating speed of the source driving circuit. For a portable electronic product, an output buffer that consumes less power can extend the life of the batteries. On the other hand, for applications of large-size LCDs (liquid crystal displays) that accompany relatively large panel loads and strict system specifications, power consumption is often considerable, which results in over-heating in the source driver chip and shortens the life of the source driver chip. A low-power output driver is desirable for solving the over-heating problem and prolonging the life of the source driver chip. Accordingly, low-power output drivers have become a mainstream in the current design trend.
FIG. 1 is a schematic diagram of a conventional source driver device. In FIG. 1, a conventional source driving circuit 100 includes an output buffering circuit 102 and a switching circuit 104.
The output buffer circuit 102 includes a first amplifier circuit 110 and a second amplifier circuit 120. Typically, the first amplifier circuit 110 includes an input stage (not shown) for receiving a first input signal SI1, and an output stage (not shown) for providing the first output signal SO1. Both of the input and output stages are coupled between a first power voltage VDDA and a second power voltage VSSA lower than VDDA. Similarly, the second amplifier circuit 120 typically includes an input stage (not shown) for receiving a second input signal SI2, and an output stage (not shown) for providing the second output signal SO2. Also, both of the input and output stages are coupled between the first power voltage VDDA and the second power voltage VSSA. Accordingly, the first and second amplifier circuits 110 and 120 are both able to drive a display panel within an output voltage range between VSSA and VDDA. The switching circuit 104 includes a first switch SW1 and a second switch SW2 that can be switched such that the first and second amplifier circuits 110 and 120 can alternatively drive different source lines on the display panel.
For the abovementioned and other reasons, to reduce the total power consumption of the conventional output buffer, especially the dynamic power consumption in charging and discharging process, in consideration of meeting other requirements such as sufficient driving ability for the display panel, simplicity of design and manufacture, and/or other characteristics of circuit structure and operation, has become an important development issue.